- Designing FPGA Logic
- Writing code in VHDL
- Designing Test Benches
- Writing Code in Verilog
- Simulating FPGA Designs
Hardware Description Languages for FPGA Design
Completed by Miron Iancu
January 6, 2020
36 hours (approximately)
Miron Iancu 's account is verified. Coursera certifies their successful completion of Hardware Description Languages for FPGA Design
What you will learn
Explain the role of HDLs in design entry and verification for FPGAs and ASICs
Utilize HDL software tools for FPGA development
Skills you will gain
