Now let's move to the next section of this training, the DSP extension instruction set. This slide gives the list of all the instructions available in the ARMv8 architecture. The green color represents the instructions that are part of Baseline, while the remaining instructions fall under ARMv8 M Mainline extension. Where the Mainline extension is implemented, then the DSP and the floating-point extensions can be implemented optionally. The red color highlighted box represented here, shows the list of instructions that fall under the DSP extension category. In order to use a specific instruction within the DSP, let's try to understand the mnemonic format used. As you can see, the first 3-5 letter word, alphabet means the operation that will be performed. The numerical value that is appended to the operation, shall specify the number of lanes that will be operated on. For example, if it is SADD8, the S stands for signed operation, and U stands for unsigned operation. Here, SADD means it is assigned addition and UADD means unassigned addition operation. Now what does the eight represents here? The eight means that it adds each byte of the first operand, to the corresponding byte of the second operand, and writes the result to the corresponding bytes of the destination register. However, if it is 16, it means that it operates on a half word. What about the UH operation? The UHADD8 means that it adds each byte of the first operand to the corresponding byte of the second operand, shuffles the result by one bit to the right, which means that halving the data, and then writes the byte results in the destination register. Just to remind ourselves, the unsigned binary numbers are by definition positive numbers, and thus do not require an arithmetic sign. An m-bit unsigned number represents all the numbers in the range of zero to 2^m minus one. For assigned binary numbers, the most significant bit of the number represents a sign bit, hence ranging from minus 2^n to plus 2^m-1. We will discuss about saturating on the exchange operations in the upcoming slides, that is, the saturating operations, the unsigned saturating operations, and then the add and subtract exchange. These are instruction details we will be seeing in the upcoming slides. SIMD techniques operate with packed data, and introduce a number of individual memory access operations, and data processing instructions required. SIMD capable Cortex-M processors can perform two or four identical operations in one instruction. This diagram demonstrates a basic SIMD instruction, unsigned add or UADD8 instruction. This instruction performs four unsigned eight-bit integer additions, and writes the result into the destination register. In this example, R_0 is the destination register, R_1 and R_2 are the source operands. What happens, we have bit number 0-7, that is, the content in the R_2 are added into the content in R_1, and then stored into the byte of R_0. Then we have the next set of bytes. Bit number eight down to 15 of R_2 and R_1 are added together, and the result is stored in R_0. The next comes our bit number 16, down to 23, that becomes our next byte. The contents of R_2 and R_1 are added together and the result is saved into R_0. Finally, the last byte. For each add operation, the carry bit is saved on to one of the bits in the GE field in the APSR register. Here, all the operations carryover, except for one, and that's what is saved in the GE field. Having seen in the previous slide that the GE field is set by a SIMD instruction that is here, let us try to understand how it can be used, especially if you want to select only a specific lane that you need to operate on. GE flags are set by our regular DSP addition and subtraction instructions. The half word SIMD instruction set two GE bits per field, while the byte-wise SIMD instruction sets one bit per field. Once the GE flags are set, there is an instruction called a SEL instruction that can be used to select either the first or the second operand based on the GE flag settings. If the GE flag is set to one, that means that by using the cell instruction, Rn will be chosen. If the GE flag is set to zero, then the Rm source operand will be selected. The SEL instruction is quite useful when you want it to do a SIMD comparison operation.
