The objective of this lecture is to show how to design an outer voltage loop around an average current mode controlled converter. In the average current mode controlled converter, the control input becomes now the output of the voltage-loop compensator, and voltage-loop compensator acts up on the error between the reference voltage and the sensed value of the output voltage. When we talk about the design of the outer voltage loop, it is important to understand the behavior of the closed-loop control-to-current response. The closed-loop control-to-current response, as we have seen in the previous lecture, that's i hat over v sub c hat. We have used circuit simulation to plot that response, and we have found that in a wide range of frequencies it follows an ideal response of just 1 over Rf. Here, we can remind ourselves why that is the case. So for a closed-loop response, we have the ideal response in front, 1 over R sub f, times the value that depends on the loop gain, Ti over 1 + Ti, where Ti is the loop gain of the current control loop. Ti is the loop gain we had used earlier to design the current loop compensator G sub ci. At frequencies where T sub i is very large, Ti over 1 + Ti approximates 1. and we indeed have that at those frequencies Gic behaves approximately as 1 over Rf. In the design of the voltage control loop around an average current mode control converter, we will in fact make use of that very simple relationship. We will design our voltage control loop to have a cross-over frequency at frequencies where the current loop behaves close to ideal. So we can rely on the very simple result for the control-to-current response of the current loop in the design of the voltage loop around the converter. Let's see exactly how to do that. Here is an important set of results that gives us a guide of how to do that. For the design of the voltage control loop around the converter, what we really need to find out is the response of the control input to the voltage that we are going to regulate. In most cases that would be the output voltage. So v hat over v sub c hat is the response that we need in order to design the voltage control loop. How do we obtain that response given that we have the inner current control loop working? Well, here is the block diagram that shows transfer functions of the converter together with the inner current control loop closed. v sub c hat is the control input to that inner current control loop, and i sub L hat is the response that we have found ideally behaves as 1 over R sub f. So iL hat in the range of frequencies where the control loop gain is very large, is simply equal to v sub c hat over R sub f. Now, on the other hand, we have that the output v hat as a function of d hat is equal to Gvd. That's the result we had earlier used in the design of the standard duty cycle controlled converter in the standard voltage mode control case. So when we look at this Gvc value that we are interested in, that's v hat over v sub c hat, we can split it into two pieces, v hat over d hat, and d hat over v sub c hat. v hat over d hat is equal to Gvd. But what is d hat over v sub c hat? In other words, we need to really eliminate the d hat from the expression, and that result comes from here. So, d hat over v sub c hat, given the relationship between iL hat and v sub c hat, and looking at d hat and iL hat here, iL hat over d hat being Gid(s). We have d hat over v sub c hat, that can be approximated as 1 over R sub f, 1 over Gid. Plug that into right here, and we have our final expression for the desired control to output voltage transfer function of an average current mode controlled converter in the form of 1 over Rf in front and the ratio of Gvd over Gid. This is a result that is valid for frequencies that are well below cross-over frequency of the current control loop. And it is actually useful to note that this is exactly the same expression we had used earlier in the peak current mode control converters, where we employed the simple model that assumed the control of the the inductor current is perfect, where we assumed that the inductor current is perfectly controlled by the peak current mode control loop. So this is exactly the same as the simple model for CPM controlled converters, and so what we have learned earlier in those examples can be applied in the case of average current mode control as well. The control loop that we are now interested in looks like this. It is the voltage control loop with v hat as the output, the sensing gain H, comparison with V reference hat, that's the V reference for the voltage control loop, the error signal processed by the voltage loop compensator G sub cv. G sub cv in turn, produces the control input to the control to output voltage transfer function that we have just determined. This transfer function is a result of the inner current control loop operating in closed loop. The loop gain is simply equal to the product of the gains in the loop, and that's H times G sub cv times 1 over R sub f, Gvd over Gid. So, the strategy for the design of the voltage control loop around an average current mode controlled converter is now simple. We have an expression for the Tv, for the loop gain for the voltage control loop. And our first step is going to be to determine that control to voltage transfer function, 1 over Rf, Gvd over Gid. Then plot uncompensated loop gain assuming that the voltage loop compensator is equal to 1. That's going to be equal to just the sensing gain times Gvc and based on that uncompensated loop gain, as usual, design the compensator transfer function Gcv so that we obtain the desired cross-over frequency and stability margins.