In this lecture, we will introduce a very popular practical method for control of switching power converters. The method is called Peak Current Mode Control, also known as Current Programmed Mode Control. The key aspect of the peak current mode control is illustrated by the waveforms shown here. In the peak current mode controller, the switch current is sensed and compared to a control input, called i_sub_c. So when this switch current reaches the i_sub_c value, the transistor switch is turned off. That's really the main feature of the peak current mode control, as opposed to duty cycle control, where the duty cycle is set by the pulse rate modulator, which in turn receives a control signal from a feedback circuit. In this case here the switch is turned off and a duty cycle of the switch are determined based on sensing a switch current or an inductor current in the converter itself. Here, we show a diagram of a typical current mode controller. The controller consists of an analog comparator that has two inputs. One input is a sensed current, that current could be switch current or inductor current. The other input is called the control input, the value of which sets the peak value of the current, when a controller is operating. On the right-hand side, we have waveforms illustrating operation of the peak current mode controller. At the beginning of a switching cycle, an internal oscillator in the controller sets the flip-flop or latch, right here, with a set signal shown here. So at the beginning of the switch cycle, there is a short set signal that turns on the main switch Q1, and the inductor current starts ramping up as shown right here. At a time when the inductor current reaches the command, the control input i_sub_c, the analog comparator outputs a reset signal, that reset signal in turn will reset the latch, and as a result the control for the converter will go to logic zero. So the control signal is going to go high at the beginning of a switching cycle, then stay high, and keep the switch Q1 on, until the current reaches the control value and then it goes low, and turns the switch Q1 off. And then the cycle repeats. The next cycle we have the same process, set signal is generated by the internal oscillator, and the reset signal is going to be again generated, when the sensed current reaches the value of the control current at the input of the peak current modulator. So you will see that this type of modulator, the current mode controller, has a number of advantages compared to the duty cycle controller. In particular, you will notice immediately, that the peak value of the switch current, or the peak value of the inductor current, is set by the control input, i_sub_c, and so that feature can be used immediately to protect the switch against over-current. Simply by limiting the value of the control current i_sub_c, we can guarantee the switch current will stay below that limit value. As an example, let's look at a simulation circuit. Here is a switching circuit simulation of a synchronous buck point of load converter that we have seen before, but you will notice that instead of the pulse modulator we have a CPM, current programmed mode controller included in the simulation model. That CPM controller includes two inputs, the control input, which sets the value for the peak current, and the sensed current value, that in this case is proportional to the inductor current. We use a controlled voltage source, proportional to the inductor current, to represent the actual physical functions of current sensing in the actual circuit. The scale factor between the inductor current and the voltage that comes as a sensed value at the input of the CPM controller, is the value that's called R_sub_f. It is the value in ohms, and this particular example has a value of .1 ohms. So, let's simulate this converter with current mode control in a transient simulation over a period of 200 microseconds. We will examine a startup transient. Here, in the simulation waveforms, the red line is the control signal, R_sub_f_i_sub_c or v_sub_c, that value is set to. 5 volts, and remember the other value in this case is .1, so, .5 volts for VC, means that we are limiting the switch current to 5 amps. The blue line shows the sensed value of the inductor current. And you see that sensed value of the inductor current has a peak, that is very closely equal to the value set by the control input. So an essentially constant current is charging up the output filter capacitor, start up transients, you see the output voltage is ramping up, as a first order system for its final value. If you zoom in on the waveforms, here we see the PWM control signal for the switch, that we call C. The duty cycle of that signal is determined by the intersection between the sensed current and the control current, as we have already explained. The switching waveforms in the power stage are shown in the bottom. Inductor current is ramping up and down in the usual manner. The switch node voltage shows the pulsating waveform as expected. But again, the main point here, is that duty cycle is not set by the traditional pulse beat modulator, but is instead set by the intersection between the sensed value of the inductor current and the control value that is set at the input of the CPM controller. Inside the CPM modulator, this is a circuit diagram that represents what is actually included in the switching.lib library, in the form of a netlist. And you see the inputs to the CPM modulator, the sensed current and the control current input. The control current input then passes through a circuit that is capable of limiting that to a desired values. So, we can impose a current limit by setting the value of Vcmax parameter, and analog comparator is included in the circuit. And that all comparator is the component that generates the reset value for the latch, and in turn ends the PWM signal at the output of the modulator. There are further details in the module that we'll discuss a little bit later, but notice that there are a number of parameters associated with this modulator including the switching frequency, the maximum value of the set current, the minimum and the maximum duty cycle and also an auxiliary parameter that's called the offset that allows us to shift the waveforms away from zero, which may be convenient in some situations or made represent operation of an actual controller chip better. Now, a voltage regulator can be fairly easily constructed around a peak current mode controlled converter. So the top part shows a switching converter buck example, but it could be any other converter with a current mode controller. And around that, we have a voltage loop closed in the following manner. We sensed the output voltage, compared to a reference, and pass that through an amplifier or a compensator. And in this case here the output of that compensator is what sets the control input for the CPM modulator. So, the inner current control loop sets the duty cycle of the switch, based on the sensed switch current or the sensed inductor current, whereas the outer voltage loop sets the control input V_sub_c, for the current control loop. So this is a two loop system, and it has interesting dynamics, has advantages, compared to the duty cycle control converter, and we will discuss those further in the lectures that follow. Advantages of current mode control, in particular, peak current mode control that we're discussing in this week, include built-in protection against overcurrent failures. Transistor failures due to excessive current can be prevented very simply by limiting the control input to the modulator. It will turn out that the current control also gives us simpler dynamics and allows us to construct the more robust voltage control loop, which can be achieved without the lead compensator. We will see examples of that in the lectures that follow. Furthermore, in converters with isolation transformer saturation problems in bridge type or push-pull converters can be mitigated using peak current mode control. We can simply ensure that the current, through the transformer, is balanced by enforcing the peak value of the current, for the two sides of the switching in the converter. Finally, CPM controlled modules can be very easily connected in parallel, by giving each module the same control current as the input; we can ensure that the current is shared equally among the modules, and so we can scale the power systems or power electronics systems in power simply by connecting modules in parallel. This is a very desirable practical feature as well. Peak current mode control does have disadvantages, and in particular, in practice, we notice an increased susceptibility to noise. So in particular, if we look at the typical shape of the switch current, like this, what happens in practice is that during switching transitions, the sensed value of the current signal can be corrupted by switching disturbances. So instead of a nice waveform like this, we may have waveform that looks like this, and then further, we have some switching noise present at the falling edge of the signal. Now, if you imagine that i_sub_c, controller input is set at a certain value, you will notice that there is a possibility of having a false triggering of the control signal for the switch. At the beginning of a switching cycle, false triggering that is excited by the noise rather than the actual value of the inductor current. So typical peak current mode controllers will include what is called a blanking interval, at the beginning of a switching period the action of the comparator that is comparing the sensed value of the current and the control value of the current will be disabled. And so that blanking interval can help us increase the immunity against noise.
