Hi! In this lesson what we are going to see is how to complete a schema that we were already familiar with, the lookup table, and setting it in the overall perspective of a configurable logic block. In doing this we can see this problem as how to go from the configuration bit in a frame, used to configure the FPGA, to this setting of the CLB or on the other hand, given a structure of a CLB, how to properly set the bit in the frame for the configuration bit string. Now, in order to be able to do this we need to start from a problem and we do have already one problem: we had the four line channel and we were designing the monitoring infrastructure. In doing that we had A, B, C, D that are our four lines and we know that our monitoring infrastructure is in charge of saying that the channel is going to be used if at least one of those lines is going to be used. In order to be able to do that we need to introduce some semantics: 0 means that the line is not used, 1 means that the line is induced. So, because of this we can see that this input 0 0 0 is going to provide us 0 as output but all the remaining configuration of these 4 inputs are going to produce 1 as output. We know that the configuration of the lookup table is basically done by storing those values here. So, we're going to have 0 in the line 0 0 0 which is this one and we are going to have one in all the other. So, let's do it. We're going to have a 0 here and 1 1 1 1 1 1 1 for all the other remaining cells. We have a multiplexer here that is going to properly combined the cells with the output according to the values that are going to be provided as input and the inputs are A, B, C, D. Now, that's great but this was something that we were already familiar with. Now, we want to complete this figure and to do this what we are willing to introduce is a register here, a flip-flop, so we're going to connect our multiplexer to this flip-flop. We can set the one that we want: we're going to have a set and clear. So, we're going to have Q and we're going to provide the opposite of Q. So, this is going to be our output. This is going to be done in order to create a sequential logic because we're going to introduce into our system something that is going to create a sort of a memory that is going to provide what is going to be the sequential logic. But, as we know, we may be willing of having a combinational logic so we may want not to use the register and to do this we're going to have the output of the multiplexer directly connected to another multiplexer that is going to set the value of our output. And in properly setting this multiplexer we're going to have a combinational or a sequential logic. Now, this is basically a simplification of a structure that, as we know, is called slice. This is one of the slices that can be included in our CLB. Now, for sake of simplicity we are considering a situation in which we are going to work with just one slice per CLB. So, we're going to say that we have one slice in one CLB. This is again a simplification: usually we have more than one slice and obviously we have one load in the slice, we may have two loads in one slice, we may have multiple slices in the CLB and so and so forth. But just to keep it simple and to have an understanding of how the thing is working we're going to say: one lookup table one slice, one slice one CLB. So, we can write it here just to make it more clear. Now, that's great but still we are not aware on how the CLB is going at the end to be configured. We know that we have a frame: we have some portions of this frame that are going to be used to store the values of the lookup table. So, part of this is going to be for the lookup table and what we're going to store here are basically the values that have to be stored here. So, we're going to have 0 1 1 1 1 1 and so on so forth for all the remaining 15 lines. That's great, but there are more blocks now in the CLP: we have a register, we have a multiplexer here so what we are really of doing is in being able to capture the fact that this circuit is going to be a combinational or a sequential one. So in order to do this we have to go back to the problem: is the problem something that needs memory or is something that according to the variation in the input is going to provide a different output? Well, as we can see if A is going to be 0, B 0, C 0, D 0, the output is 0 but as soon as one of these outputs is going to vary, unless we have a clock, but let's keep it simple, one modification in the input, so we're gonna have maybe B equal to 1: it's going to imply that our output is going to be set to 1. So, in saying this we are basically saying that we are not going to use this. So, what we are going to have is a connection of this one with the multiplexer but both the lines are here, so what is going to tell us, to guarantee us that we're going to use this connection? Well, the video that we're going to store here 0 or 1. Now, let's say that 0 is going to enable this and 1 is going to enable this. What we are looking for is for something that is going to tell us: set this configuration bit to zero, and that is where we are going to store this information. So, now what we did is: we have the problem, we are capturing more information, we are having a better understanding of the problem, we know that in our FPGA we are not just configuring lookup table but we have a more complex situation where we're gonna have sequential and combinational logic that can be implemented and we have to be able to implement both. But at the end because of the problem you are just going to use one of them or obviously a combination of them according to the complexity of the problem, but in this case combinational combinational, so we are not going to use this register, we are going to use this dark path, so we're going to enable this 0, this 0 is going to be set here and with it we have now the part of the frame that is going to be used to configure this specific CLB. Now, just a final note: I used the term register through all the lesson but obviously this is not a register this is just a single flip-flop. You know better to say it then not to say it explicitly
