- Electrical and Computer Engineering
- Functional Testing
- Technical Design
- Simulation and Simulation Software
- Electronic Hardware
- Embedded Systems
- Test Case
- Hardware Design
- Field-Programmable Gate Array (FPGA)
- Functional Design
- Computer Engineering
- Verification And Validation
Hardware Description Languages for FPGA Design
Completed by DMITRY LAPTEV
May 4, 2020
36 hours (approximately)
DMITRY LAPTEV's account is verified. Coursera certifies their successful completion of Hardware Description Languages for FPGA Design
What you will learn
Explain the role of HDLs in design entry and verification for FPGAs and ASICs
Utilize HDL software tools for FPGA development
Skills you will gain
