About this Course

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Start instantly and learn at your own schedule.
Flexible deadlines
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Intermediate Level
Approx. 36 hours to complete
English

Skills you will gain

Writing Code in VerilogSimulating FPGA DesignsDesigning FPGA LogicDesigning Test BenchesWriting code in VHDL
Shareable Certificate
Earn a Certificate upon completion
100% online
Start instantly and learn at your own schedule.
Flexible deadlines
Reset deadlines in accordance to your schedule.
Intermediate Level
Approx. 36 hours to complete
English

Offered by

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University of Colorado Boulder

Start working towards your Master's degree

This course is part of the 100% online Master of Science in Electrical Engineering from University of Colorado Boulder. If you are admitted to the full program, your courses count towards your degree learning.

Syllabus - What you will learn from this course

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Week
1

Week 1

8 hours to complete

Basics of VHDL

8 hours to complete
10 videos (Total 48 min), 3 readings, 6 quizzes
Week
2

Week 2

12 hours to complete

VHDL Logic Design Techniques

12 hours to complete
10 videos (Total 52 min), 2 readings, 6 quizzes
Week
3

Week 3

7 hours to complete

Basics of Verilog

7 hours to complete
9 videos (Total 92 min), 2 readings, 6 quizzes
Week
4

Week 4

10 hours to complete

Verilog and System Verilog Design Techniques

10 hours to complete
10 videos (Total 48 min), 2 readings, 6 quizzes

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About the FPGA Design for Embedded Systems Specialization

FPGA Design for Embedded Systems

Frequently Asked Questions

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