This course can also be taken for academic credit as ECEA 5361, part of CU Boulder’s Master of Science in Electrical Engineering degree.
This course is part of the FPGA Design for Embedded Systems Specialization
About this Course
Skills you will gain
- Writing Code in Verilog
- Simulating FPGA Designs
- Designing FPGA Logic
- Designing Test Benches
- Writing code in VHDL
Start working towards your Master's degree
Syllabus - What you will learn from this course
Basics of VHDL
VHDL Logic Design Techniques
Basics of Verilog
Verilog and System Verilog Design Techniques
- 5 stars59.04%
- 4 stars28.03%
- 3 stars6.95%
- 2 stars2.98%
- 1 star2.98%
TOP REVIEWS FROM HARDWARE DESCRIPTION LANGUAGES FOR FPGA DESIGN
This course is very helpful in understanding the basics of hardware description languages and now after doing this course i am very much comfortable in using verilog and vhdl language.
Excellent course, helped me to gain reasonably good foundation on both VHDL and Verilog effectively in a short period of time.
Though the support of this course is quite poor and the forum is really dull, the course in itself is really something!!
Professors were top-notch and clearly explained the pros and cons of each of the languages. I hope I could meet them in person.
About the FPGA Design for Embedded Systems Specialization
Frequently Asked Questions
When will I have access to the lectures and assignments?
What will I get if I subscribe to this Specialization?
What is the refund policy?
Is financial aid available?
More questions? Visit the Learner Help Center.