Introduction to FPGA Design for Embedded Systems

Introduction to FPGA Design for Embedded Systems

This course is part of FPGA Design for Embedded Systems Specialization

Instructor: Timothy Scherr

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4 modules

Gain insight into a topic and learn the fundamentals.

4.6

(1,178 reviews)

Intermediate level

Some related experience required

Flexible schedule

2 weeks at 10 hours a week

Learn at your own pace

91%

Most learners liked this course

4 modules

Gain insight into a topic and learn the fundamentals.

4.6

(1,178 reviews)

Intermediate level

Some related experience required

Flexible schedule

2 weeks at 10 hours a week

Learn at your own pace

91%

Most learners liked this course

What you'll learn

Describe what an FPGA is and how this technology was developed
Determine how to select the best FPGA architecture for a given application
Use state of the art software tools for FPGA development and solve critical digital design problems using FPGAs

Skills you'll gain

Details to know

Shareable certificate

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Assessments

5 assignments

Taught in English

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This course is part of the FPGA Design for Embedded Systems Specialization

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There are 4 modules in this course

This course can also be taken for academic credit as ECEA 5360, part of CU Boulder’s Master of Science in Electrical Engineering degree.

Programmable Logic has become more and more common as a core technology used to build electronic systems. By integrating soft-core or hardcore processors, these devices have become complete systems on a chip, steadily displacing general purpose processors and ASICs. In particular, high performance systems are now almost always implemented with FPGAs. This course will give you the foundation for FPGA design in Embedded Systems along with practical design skills. You will learn what an FPGA is and how this technology was developed, how to select the best FPGA architecture for a given application, how to use state of the art software tools for FPGA development, and solve critical digital design problems using FPGAs. You use FPGA development tools to complete several example designs, including a custom processor. If you are thinking of a career in Electronics Design or an engineer looking at a career change, this is a great course to enhance your career opportunities. Hardware Requirements: You must have access to computer resources to run the development tools, a PC running either Windows 7, 8, or 10 or a recent Linux OS which must be RHEL 6.5 or CentOS Linux 6.5 or later. Either Linux OS could be run as a virtual machine under Windows 8 or 10. The tools do not run on Apple Mac computers. Whatever the OS, the computer must have at least 8 GB of RAM. Most new laptops will have this, or it may be possible to upgrade the memory.

What's this programmable logic stuff anyway? In Module 1 you learn about the history and architecture of programmable logic devices including Field Programmable Gate Arrays (FPGAs). You will learn how to describe the difference between an FPGA, a CPLD, an ASSP, and an ASIC, recite the historical development of programmable logic devices; and design logic circuits using LUTs. Examples will include designs of digital adders and multipliers in FPGAs.

What's included

9 videos5 readings1 assignment1 peer review2 discussion prompts

9 videosTotal 46 minutes

Course Introduction1 minutePreview module
Course Overview6 minutes
1. Welcome to the world of programmable logic and FPGA design1 minute
2. A Brief History of Programmable Logic9 minutes
3. CPLD Architecture5 minutes
4. LUTs and FPGA Architecture8 minutes
5. LUTs for Logic Design2 minutes
6. Designing Adders6 minutes
7. Designing Multipliers3 minutes

5 readingsTotal 120 minutes

About This Course10 minutes
Hardware Requirements10 minutes
Introduction to FPGA Design for Embedded Systems Assessment Strategy10 minutes
Week 1 Suggested Readings80 minutes
Week 2 Assignment Instructions and Files10 minutes

1 assignmentTotal 30 minutes

Mission 002: Week 1 Quiz30 minutes

1 peer reviewTotal 60 minutes

Mission 001: Week 1 Application Assignment60 minutes

2 discussion promptsTotal 20 minutes

Introduce Yourself10 minutes
Look-up Tables vs. Gates10 minutes

In Module 2 you will install and use sophisticated FPGA design tools to create an example design. You will learn the steps in the standard FPGA design flow, how to use Intel Altera’s Quartus Prime Development Suite to create a pipelined multiplier, and how to verify the integrity of the design using the RTL Viewer and by simulation using ModelSim. Using the TimeQuest timing analyzer, you will analyze the timing of your design to achieve timing closure.

What's included

10 videos2 readings2 assignments1 peer review

10 videosTotal 118 minutes

1. The FPGA Design Flow4 minutesPreview module
3. Installing Quartus Prime2 minutes
4. Introducing Quartus Prime11 minutes
5. Create a design project in Quartus Prime7 minutes
6. Create a design in Quartus Prime13 minutes
7. Compile a Design17 minutes
8. View the RTL16 minutes
9. Timing Analysis with Time Quest I9 minutes
10. Timing Analysis with Time Quest II16 minutes
11. Simulate a design with ModelSim17 minutes

2 readingsTotal 25 minutes

Week 2 Suggested Readings20 minutes
Week 2 Required Reading and File Installation5 minutes

2 assignmentsTotal 60 minutes

Mission 003 : Practice Opportunity30 minutes
Mission 005: Week 2 Quiz30 minutes

1 peer reviewTotal 60 minutes

Mission 004: Week 2 Application Assignment60 minutes

FPGAs are programmable, and the program resides in a memory which determines how the logic and routing in the device is configured. In Module 3 you will learn the pros and cons of FLASH-based, SRAM-based, and Anti-Fuse based FPGAs. A survey of modern FPGA architectures will give you the tools to determine which type of FPGA is the best fit for a design. Architectures will be explored from the basic core logic cell up to consideration of large Intellectual Property (IP) blocks that are available on many FPGAs.

What's included

8 videos2 readings1 assignment2 discussion prompts

8 videosTotal 79 minutes

1. Many types of FPGAs5 minutesPreview module
2. Xilinx CPLD Architecture7 minutes
3. Xilinx Small FPGAs8 minutes
4. Xilinx Large FPGAs11 minutes
5. Altera CPLDs and Small FPGAs8 minutes
6. Altera Large FPGAs9 minutes
7. Microsemi Single-chip FPGA solutions14 minutes
8. Lattice Single-Chip FPGA solutions14 minutes

2 readingsTotal 90 minutes

Week 3 Suggested Readings80 minutes
Week 4 Assignment Instructions and Files10 minutes

1 assignmentTotal 30 minutes

Mission 006: Week 3 Quiz30 minutes

2 discussion promptsTotal 20 minutes

Intel/Altera MAX1010 minutes
FLASH Configuration Memory in Microsemi FPGAs10 minutes

In module 4 you will extend and enhance your design from module 2, completing the design by adding IP blocks, implementing pin assignments and creating a programming file for the FPGA. One outcome will be improved design productivity, by use of design techniques like pipelining, and by the use of system design tools like Qsys, the system design tool in Quartus Prime. You will complete a Qsys system design by creating a NIOS II softcore processor design, which quickly gives you the powerful ability to customize a processor to meet your specific needs.

What's included

10 videos1 reading1 assignment1 peer review1 discussion prompt

10 videosTotal 179 minutes

1. FPGA Design Expertise5 minutesPreview module
2. Advanced Schematic Entry for FPGA Design- Drawing and Hierarchy26 minutes
3. Improving Productivity with IP Blocks25 minutes
4. Improving Timing with Pipelining18 minutes
5. FPGA IO: Getting In and Getting Out8 minutes
6. Pin Assignments: Making them Spot On!20 minutes
7. Programming the FPGA10 minutes
8. Becoming one with Q: Qsys System Design20 minutes
9.a Becoming one with Q Part II: Qsys System Design Finishing Touches25 minutes
9.b Becoming one with Q Part III: Qsys System Design Finishing Touches19 minutes

1 readingTotal 70 minutes

Week 4 Suggested Readings70 minutes

1 assignmentTotal 30 minutes

Mission 008: Week 4 Quiz30 minutes

1 peer reviewTotal 60 minutes

Mission 007: Week 4 Application Assignment60 minutes

1 discussion promptTotal 10 minutes

Pipelines and IP blocks10 minutes

Instructor

Instructor ratings

4.5 (324 ratings)

Timothy Scherr

University of Colorado Boulder

5 Courses108,669 learners

Offered by

University of Colorado Boulder

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4.6

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Reviewed on Nov 15, 2018

It had been quiet a knowledgeable course with the best aiding CAD tools and elobarate walk-through to work with it. Definitely a good starter into world of FPGA design.

Reviewed on Aug 11, 2020

Some procedures through the tutorials in the course are told without explanation, why we use this or why we do that.But overall this is an amazing course, and I learned a lot from it. Thank you all ❤️

Reviewed on May 4, 2020

The course was exceptional with very structured and organized way of delivering content to the students. A must do course for all FPGA beginner's.

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