About this Course

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Learner Career Outcomes

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Flexible deadlines
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Advanced Level
Approx. 50 hours to complete
English

Learner Career Outcomes

50%

got a tangible career benefit from this course
100% online
Start instantly and learn at your own schedule.
Flexible deadlines
Reset deadlines in accordance to your schedule.
Advanced Level
Approx. 50 hours to complete
English

Offered by

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Princeton University

Syllabus - What you will learn from this course

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Week
1

Week 1

4 hours to complete

Introduction, Instruction Set Architecture, and Microcode

4 hours to complete
8 videos (Total 106 min), 2 readings
8 videos
Course Overview4m
Motivation16m
Course Content9m
Architecture and Microarchitecture23m
Machine Models16m
ISA Characteristics25m
Recap1m
2 readings
Readings2h
Problem Set 1 & 1A
3 hours to complete

Pipelining Review

3 hours to complete
4 videos (Total 102 min), 1 reading
4 videos
Pipeline Basics30m
Structural Hazard10m
Data Hazards46m
1 reading
Readings1h 30m
Week
2

Week 2

3 hours to complete

Cache Review

3 hours to complete
5 videos (Total 93 min), 1 reading
5 videos
Control Hazards, Branch24m
Control Hazards, Others7m
Memory Technologies22m
Motivation for Caches22m
1 reading
Readings1h
3 hours to complete

Superscalar 1

3 hours to complete
5 videos (Total 68 min), 1 reading
5 videos
Cache Performance17m
Superscalar 16m
Basic Two-way In-order Superscalar4m
Fetch Logic and Alignment11m
1 reading
Readings1h 30m
Week
3

Week 3

2 hours to complete

Superscalar 2 & Exceptions

2 hours to complete
4 videos (Total 77 min), 1 reading
4 videos
Interrupts and Bypassing12m
Interrupts and Exceptions29m
Introduction to Out-of-Order Processors30m
1 reading
Readings45m
2 hours to complete

Superscalar 3

2 hours to complete
5 videos (Total 73 min), 2 readings
5 videos
I2O2 Processors19m
I2O1 Processors28m
IO3 Processors16m
IO2I Processors4m
2 readings
Problem Set 210m
Problem Set 1 Solutions10m
Week
4

Week 4

1 hour to complete

Superscalar 4

1 hour to complete
5 videos (Total 73 min)
5 videos
Register Renaming Introduction11m
Register Renaming with Pointers to IQ and ROB24m
Register Renaming with Values in IQ and ROB12m
Memory Disambiguation9m
2 hours to complete

VLIW 1

2 hours to complete
5 videos (Total 75 min), 3 readings
5 videos
Introduction to VLIW21m
VLIW Compiler Optimizations21m
Classic VLIW Challenges8m
Introduction to Predication9m
3 readings
Readings10m
Problem Set 310m
Problem Set 2 Solutions10m

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