This course will give you hands-on FPGA design experience that uses all the concepts and skills you have developed up to now. You will need to purchase a DE10-Lite development kit. You will setup and test the MAX10 DE10-Lite board using the FPGA design tool Quartus Prime and the System Builder.
You will: Design and test a Binary Coded Decimal Adder. Design and test a PWM Circuit, with verification by simulation. Design and test an ADC circuit, using Quartus Prime built-in tools to verify your circuit design. Create hardware for the NIOS II soft processor, including many interfaces, using Qsys (Platform Designer). Instantiate this design into a top-level DE10-Lite HDL file. Compile your completed hardware using Quartus Prime. Enhance and test a working design, using most aspects of the Quartus Prime Design Flow and the NIOS II Software Build Tools (SBT) for Eclipse. Create software for the NIOS II soft processor, including many interfaces, using Qsys (Platform Designer) and the SBT. Compile your completed software using the SBT. Use Quartus Prime to program both the FPGA hardware configuration and software code in you DE10-Lite development kit. Record all your observations in a lab notebook pdf. Submit your project files and lab notebook for grading. This course consists of 4 modules, approximately 1 per week for 4 weeks. Each module will include an hour or less of video lectures, plus reading assignments, discussion prompts, and project assignment that involves creating hardware and/or software in the FPGA. This course includes specific hardware and software requirements. Please review the FAQ below for complete details.
SM
It is a great course to learn everything about FPGA, VHDL and Verilog.
CL
In general a good course structure and content. It lacks support on question and exercises.
DK
Requires knowledge of FPGA design flow (make sure to take 3 courses before this one), great practical tasks that complete the whole specialization.
LS
very good information auto graded is a big turn off
OS
This specialization has a very good balance between deepness and breadth of transmitted knowledge. Thank you !
JV
Excellent integration of all the knowledge aquired in the previous courses.
Showing: 11 of 11
In general a good course structure and content. It lacks support on question and exercises.
This was a fun class. I learned a lot. I feel like it really put a lot of what I learned to use and brought the material from the four courses in the specialty together. The result was cool. I had several “Wow!” moments along the line. Still, I give the class four stars. I’d give it a five, but there are some things that need improvement to get there. First, as I’ll say here and elsewhere, if it is at all possible, use Microsoft Windows rather than Linux. In my opinion, the course instructions should no longer recommend Linux. I spent a couple of work days along the way attempting to get Linux to work and gave up. Linux binaries aren’t provided by the class. The newest version of Quartus doesn’t have Modelsim. Modelsim is a 32-bit executable. The NIOS II EDS is tightly integrated into an old version of Eclipse that only runs on old versions of Java (that Intel only supports under SUSE 12). Second, the auto grader for assignments can be nonsensical and provide very limited feedback as to what you did wrong and how you can improve your grade (or learn from your mistakes). To make matters worse, there’s no written rubric as to how points are awarded. I had assignments that worked as specified that didn’t get full credit. I couldn’t figure out why. Third, the DE10-Lite is getting expensive. It was $50 a couple years ago. As of December 2022, it's $140 plus shipping from Taiwan from Terasic or $293 on Amazon. All that aside, I really did enjoy the work. For a while it was an almost unhealthy obsession. :-)
Requires knowledge of FPGA design flow (make sure to take 3 courses before this one), great practical tasks that complete the whole specialization.
This specialization has a very good balance between deepness and breadth of transmitted knowledge. Thank you !
Grading system could be better
You'll spend more time fighting the autograder than completing the assignments.
Excellent integration of all the knowledge aquired in the previous courses.
Excellent course.
It is a great course to learn everything about FPGA, VHDL and Verilog.
very good information auto graded is a big turn off
This is a good course.
For some reason, I am looking for a course based on Xilinx FPGA. this one is based on Altera/Intel FPGA