Electrónica Digital Bit a Bit: Diseñando en Verilog para FPGA

Completed by Francisco Javier Burgoa Roman

August 4, 2025

12 hours (approximately)

View certificate for Francisco Javier Burgoa Roman, Electrónica Digital Bit a Bit: Diseñando en Verilog para FPGA, an online non-credit course authorized by Pontificia Universidad Católica de Chile and offered through Coursera