Hardware Description Languages for FPGA Design
Completed by SHREYAS LAXMIKANT BORSE
July 23, 2021
36 hours (approximately)
SHREYAS LAXMIKANT BORSE's account is verified. Coursera certifies their successful completion of Hardware Description Languages for FPGA Design
What you will learn
Explain the role of HDLs in design entry and verification for FPGAs and ASICs
Utilize HDL software tools for FPGA development
Skills you will gain
- Category: Test Tools
- Category: Hardware Design
- Category: Field-Programmable Gate Array (FPGA)
- Category: Functional Testing
- Category: Development Testing
- Category: Electrical and Computer Engineering
- Category: Test Script Development
- Category: Simulation and Simulation Software
- Category: Computer Programming
- Category: Test Case
- Category: Simulations
- Category: Debugging
