Hardware Description Languages for FPGA Design
Completed by JAMES ISAAC HARDIN
March 25, 2020
36 hours (approximately)
JAMES ISAAC HARDIN's account is verified. Coursera certifies their successful completion of Hardware Description Languages for FPGA Design
What you will learn
Explain the role of HDLs in design entry and verification for FPGAs and ASICs
Utilize HDL software tools for FPGA development
Skills you will gain
- Category: Computer Programming
- Category: System Design and Implementation
- Category: Development Testing
- Category: Electronics
- Category: Electrical and Computer Engineering
- Category: Debugging
- Category: Test Tools
- Category: Simulations
- Category: Field-Programmable Gate Array (FPGA)
- Category: Test Case
- Category: Programming Principles
- Category: Hardware Design
