Back to FPGA Softcore Processors and IP Acquisition
University of Colorado Boulder

FPGA Softcore Processors and IP Acquisition

This course will introduce you to all aspects of development of Soft Processors and Intellectual Property (IP) in FPGA design. You will learn the extent of Soft Processor types and capabilities, how to make your own Soft Processor in and FPGA, including how to design the hardware and the software for a Soft Processor. You will learn how to add IP blocks and custom instructions to your Soft Processor. After the Soft Processor is made, you learn how to verify the design using simulation and an internal logic analyzer. Once complete you will know how to create and use Soft Processors and IP, a very useful skill. This course consists of 4 modules, approximately 1 per week for 4 weeks. Each module will include an hour or two of video lectures, reading assignments, discussion prompts, and an end of module assessment. This course includes specific hardware and software requirements. Please review the FAQ below for complete details.

Status: Computer Architecture
Status: Microarchitecture
IntermediateCourse11 hours

Featured reviews

MB

Reviewed Aug 11, 2021

I was hoping to get more lecture material on writing testbench code.

HG

Reviewed Jan 1, 2021

Well prepared lessons(videos). Concise and complete.

AS

Reviewed Oct 18, 2022

t​he course is structured properly as practical demo has been given with theoretical concepts.

HS

Reviewed Sep 7, 2021

The course bring good theoric bases to IPCores but leaves short informacion about the Qsys use, memory map and others things that are necesary for system integration.

OS

Reviewed Dec 8, 2020

I feel I did another small step towards mastering designing with fpga. Thank you!

KS

Reviewed Oct 13, 2020

I learned a lot about modelsim that I was really needed.

JC

Reviewed Jul 16, 2023

This course is excellent. There are a lot of practical knowledge to deepen and enlarge the contents of the previous courses.

BT

Reviewed Jun 11, 2021

Must-take Course for Hardware Engineeer. This course provides new concept about NIOS II 32-bit RISC Architecture and How HDL Simulation work

CB

Reviewed Jul 31, 2023

Very interesting for demonstration purposes. There is much to be learned by working on your own afterwards with the notes taken.

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