Hardware Description Languages for FPGA Design
Completed by Rohith Reddy Appidi
July 15, 2020
36 hours (approximately)
Rohith Reddy Appidi's account is verified. Coursera certifies their successful completion of Hardware Description Languages for FPGA Design
What you will learn
Explain the role of HDLs in design entry and verification for FPGAs and ASICs
Utilize HDL software tools for FPGA development
Skills you will gain
- Category: Systems Design
- Category: Verification And Validation
- Category: Test Script Development
- Category: Functional Testing
- Category: Test Tools
- Category: System Design and Implementation
- Category: Development Testing
- Category: Electronics
- Category: Electronic Hardware
- Category: Software Design
- Category: Simulations
- Category: Simulation and Simulation Software
