Hardware Description Languages for FPGA Design
Completed by Harsh Agrawal
June 15, 2020
36 hours (approximately)
Harsh Agrawal's account is verified. Coursera certifies their successful completion of Hardware Description Languages for FPGA Design
What you will learn
Explain the role of HDLs in design entry and verification for FPGAs and ASICs
Utilize HDL software tools for FPGA development
Skills you will gain
- Category: Test Script Development
- Category: Functional Testing
- Category: Programming Principles
- Category: Electrical and Computer Engineering
- Category: Systems Design
- Category: Verification And Validation
- Category: Electronics
- Category: Development Testing
- Category: Computer Engineering
- Category: Application Specific Integrated Circuits
- Category: System Design and Implementation
- Category: Field-Programmable Gate Array (FPGA)

