Hardware Description Languages for FPGA Design
Completed by KAIVAL KIRITKUMAR SHAH
March 23, 2020
36 hours (approximately)
KAIVAL KIRITKUMAR SHAH's account is verified. Coursera certifies their successful completion of Hardware Description Languages for FPGA Design
What you will learn
Explain the role of HDLs in design entry and verification for FPGAs and ASICs
Utilize HDL software tools for FPGA development
Skills you will gain
- Category: Verification And Validation
- Category: Simulation and Simulation Software
- Category: Computer Programming
- Category: Functional Design
- Category: System Design and Implementation
- Category: Electronics
- Category: Functional Testing
- Category: Test Script Development
- Category: Simulations
- Category: Electrical and Computer Engineering
- Category: Programming Principles
- Category: Field-Programmable Gate Array (FPGA)
