Hardware Description Languages for FPGA Design
Completed by VEETURI VENKATA SAI SHRAVAN
October 28, 2020
36 hours (approximately)
VEETURI VENKATA SAI SHRAVAN's account is verified. Coursera certifies their successful completion of Hardware Description Languages for FPGA Design
What you will learn
Explain the role of HDLs in design entry and verification for FPGAs and ASICs
Utilize HDL software tools for FPGA development
Skills you will gain
- Category: Functional Testing
- Category: System Design and Implementation
- Category: Development Testing
- Category: Electronics
- Category: Computer Programming
- Category: Electronic Hardware
- Category: Verification And Validation
- Category: Application Specific Integrated Circuits
- Category: Field-Programmable Gate Array (FPGA)
- Category: Test Script Development
- Category: Test Case
- Category: Computational Logic
