Hardware Description Languages for FPGA Design
Completed by Balijepalli Bala Venkata Satya Siva Sundar Kumar
September 7, 2020
36 hours (approximately)
Balijepalli Bala Venkata Satya Siva Sundar Kumar's account is verified. Coursera certifies their successful completion of Hardware Description Languages for FPGA Design
What you will learn
Explain the role of HDLs in design entry and verification for FPGAs and ASICs
Utilize HDL software tools for FPGA development
Skills you will gain
- Category: Simulation and Simulation Software
- Category: Computer Programming
- Category: Application Specific Integrated Circuits
- Category: Test Case
- Category: Hardware Design
- Category: Field-Programmable Gate Array (FPGA)
- Category: Electronics Engineering
- Category: Electronic Hardware
- Category: Simulations
- Category: Electrical and Computer Engineering
- Category: System Design and Implementation
- Category: Development Testing
