Hardware Description Languages for FPGA Design
Completed by Eddy Zhong
February 12, 2021
36 hours (approximately)
Eddy Zhong's account is verified. Coursera certifies their successful completion of Hardware Description Languages for FPGA Design
What you will learn
Explain the role of HDLs in design entry and verification for FPGAs and ASICs
Utilize HDL software tools for FPGA development
Skills you will gain
- Category: Electronics Engineering
- Category: Functional Testing
- Category: Functional Design
- Category: Programming Principles
- Category: Electrical and Computer Engineering
- Category: Electronics
- Category: Electronic Hardware
- Category: System Design and Implementation
- Category: Development Testing
- Category: Systems Design
- Category: Verification And Validation
- Category: Hardware Design
