Hardware Description Languages for FPGA Design
Completed by UJWAL UTTARWAR
April 26, 2020
36 hours (approximately)
UJWAL UTTARWAR's account is verified. Coursera certifies their successful completion of Hardware Description Languages for FPGA Design
What you will learn
Explain the role of HDLs in design entry and verification for FPGAs and ASICs
Utilize HDL software tools for FPGA development
Skills you will gain
- Category: System Design and Implementation
- Category: Electronics
- Category: Electrical and Computer Engineering
- Category: Programming Principles
- Category: Verification And Validation
- Category: Simulations
- Category: Test Case
- Category: Application Specific Integrated Circuits
- Category: Test Script Development
- Category: Functional Testing
- Category: Simulation and Simulation Software
- Category: Computer Programming
