Hardware Description Languages for FPGA Design
Completed by ADITYA S HOOLI
July 30, 2020
36 hours (approximately)
ADITYA S HOOLI's account is verified. Coursera certifies their successful completion of Hardware Description Languages for FPGA Design
What you will learn
Explain the role of HDLs in design entry and verification for FPGAs and ASICs
Utilize HDL software tools for FPGA development
Skills you will gain
- Category: Debugging
- Category: Test Tools
- Category: Functional Testing
- Category: Field-Programmable Gate Array (FPGA)
- Category: Computer Programming
- Category: Programming Principles
- Category: Simulation and Simulation Software
- Category: Simulations
- Category: Test Case
- Category: System Design and Implementation
- Category: Verification And Validation
- Category: Computational Logic
