Hardware Description Languages for FPGA Design
Completed by ADITYA S HOOLI
July 30, 2020
36 hours (approximately)
ADITYA S HOOLI's account is verified. Coursera certifies their successful completion of Hardware Description Languages for FPGA Design
What you will learn
Explain the role of HDLs in design entry and verification for FPGAs and ASICs
Utilize HDL software tools for FPGA development
Skills you will gain
- Category: Verification And Validation
- Category: Computational Logic
- Category: Programming Principles
- Category: Functional Testing
- Category: Test Script Development
- Category: Simulation and Simulation Software
- Category: System Design and Implementation
- Category: Simulations
- Category: Electronic Hardware
- Category: Debugging
- Category: Electrical and Computer Engineering
- Category: Hardware Design
